Memory makers have allocated 2027 to AI, and the $100 smartphone is the first product to go
Memory makers have committed 2027 capacity to AI while sub-$100 phone shipments fell almost 60% year over year; here is the wafer arithmetic behind the squeeze, the device-market evidence, and the decisions a product team should make against supply that stays tight into 2028.
Memory makers have already committed most of next year to AI, and the cheapest smartphones are the first product to go. Shipments of phones priced under $100 fell almost 60% year over year in the second quarter of 2026, after 173 million of them shipped worldwide in 2025 1. Prices on phones already on sale climbed about 15% over 2026, and newly launched models arrived roughly 25% more expensive than the ones they replaced 2.
The cause sits on the other side of the same fabs. Memory is a wafer business, and the three companies that make more than 90% of the world's DRAM have been redirecting their best capacity toward AI accelerators since late 2025 3. Every product that still needs ordinary memory is now bidding for what is left, and the cheapest devices have the least margin to absorb a doubling in the cost of their most expensive component.
This week the shortage crossed from a market story into an allocation story. Three supplier documents published in the last nine days say the same thing from different angles: the capacity is spoken for through 2028, the price increases are already negotiated for next year, and nobody who makes the products has a date for relief. That last part is what a product team needs to plan against.
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That Business Insider explainer, published in late August, walks through why the same memory the AI buildout wants is the memory laptops, phones and consoles use.
What changed in the last nine days
Start with the prices, because they are the part with a number attached. TrendForce projects conventional DRAM contract prices to rise another 10–15% in the fourth quarter of 2026, on top of the increases already booked earlier in the year, with NAND flash up 15–20% 4. The reason is a capacity decision: DRAM suppliers keep assigning advanced-process capacity to high-performance server products, which leaves the whole market undersupplied.
The same release carries a detail that matters more than the headline number. Mobile DRAM allocations are tight specifically because suppliers moved capacity toward server products, and TrendForce expects PC DRAM supply to decline in 2027 as more capacity shifts the same way 4. The squeeze on consumer memory is a scheduling outcome, and the schedule for 2027 is already written.
The second document is a revision. In a release dated 29 September, TrendForce raised its 2027 outlook for HBM pricing to a blended average selling price 121% higher than 2026, and described HBM and conventional DRAM as competing for the same limited advanced-process and wafer capacity 5. It also reported something a product planner should read twice: GPU and ASIC vendors are discussing cutting the HBM capacity they put on each device, moving from 12-layer stacks to 8-layer stacks. That reduces cost per accelerator, and it raises the price per gigabit, because the fixed cost of a stack's base die gets spread over fewer memory dies — TrendForce puts the premium at 10–20% per gigabit for 8-layer parts in 2027 5.
The third is a supplier's own words. Micron's prepared remarks for its fiscal fourth-quarter call tell investors that industry demand strengthened since the previous quarter's call, that memory and storage supply-demand conditions will be "much tighter in fiscal 2027 and 2028 than they were in 2026," and that the company has completed agreements for the vast majority of its calendar 2027 HBM bit supply with significant year-over-year price increases 6. Its own forecast has industry DRAM bit shipments growing in the low twenties percentage range in both 2027 and 2028, and the industry remaining supply constrained in both years. On rebalancing, the document is blunt: "we do not have line of sight to when supply and demand will rebalance" 6.
A second bottleneck stacks on the first. An HBM device exists only once its DRAM dies have been stacked, bonded and packaged, so die output from a fab becomes sellable HBM only when advanced packaging capacity exists to receive it, and the industry is building that capacity as a separate project 3. The week produced a live illustration. AMD's chief executive Lisa Su spent it in Taiwan asking rival chipmakers to coordinate on advanced-packaging and substrate capacity so the industry stops bidding against itself, with the company carrying roughly 14 gigawatts of AI data-centre agreements and a pledge of $10 billion through 2029 to its Taiwanese partners 7. When a chip designer publicly asks competitors to share a bottleneck, the bottleneck is the story.
Since a shortage in one component tends to move suppliers together, the week produced corroboration from three unrelated parts of the bill of materials. Japanese and Korean MLCC makers are cutting consumer supply to reallocate capacity to AI applications 8. TV panel costs are forecast to rise 4–7% sequentially in the fourth quarter as AI demand crowds upstream material capacity 4. Toshiba is spending $380 million to double its AI data-center hard-drive capacity by fiscal 2027 9, while Seagate and Toshiba are bidding against each other for TDK's hard-drive magnetic-head business 10. When the storage industry starts buying up its own suppliers, the demand behind it is structural.
There is a cyclical warning attached to all of it. CSIS describes the current shortage as a structural AI demand shock layered onto an industry that still runs on extreme fixed costs, multi-year construction lead times and a recurring incentive to overbuild once prices rise 3. That history is why all three suppliers are asking buyers to stop hoarding and double-ordering: speculative orders inflate apparent demand, and the inventory built on top of them lands as a glut when new fabs come online 3. The shortage will end. What a planning cycle has to decide is whether the buffer it is holding reflects a real requirement or a reaction to this month's headlines.
Why AI takes the wafers
The mechanism is easier to hold onto than the numbers suggest, and it is the reason this shortage behaves differently from a normal memory cycle.
HBM is DRAM. It is the same memory cells made in the same fabs, stacked up to sixteen dies deep, joined by thousands of copper through-silicon vias and mounted next to the processor on a silicon interposer 3. AI accelerators need thousands of parallel connections, so a single HBM stack delivers more than 2 TB/s where a PCIe 6.0 x16 link moves 128 GB/s in one direction 11. That bandwidth is the product. What it costs is wafer area: Micron has estimated that producing the same number of bits in HBM3E takes roughly three times the wafer supply of DDR5 on a comparable node 12.
Samsung's executive vice president Kim Taewoo told reporters that HBM will consume close to 30% of the DRAM industry's total wafer capacity in 2027, up from about 20% now, and TrendForce's independent estimate moves the same way, from roughly 18% at the end of 2025 to 22% in 2026 and 30% in 2027 13. Put the two facts together and the arithmetic does the work: thirty percent of the wafers, and a far smaller share of the bits, because each of those bits consumes several times the silicon.
The demand side has no ceiling either. Inference runs in two stages — prefill, which reads the prompt and writes a key-value cache, and decode, which reads that cache one token at a time and writes back to it as the answer grows 11. A single-pass assistant runs that once per answer. An agent runs it in a loop, and the cache grows with every turn, every increase in context length and every parallel user 11.
The industry's response is to rebuild the memory hierarchy underneath HBM so that less-frequently-used cache can live somewhere cheaper. SanDisk and SK hynix are developing High Bandwidth Flash, which stacks NAND vertically to reach a projected 512 GB per stack at around 1.6 TB/s — roughly ten times the capacity of an HBM4 stack 11. Nvidia introduced the concept of an SSD POD in 2026, and cloud providers now tier the key-value cache across four or more storage layers 14. Marvell's data-center group described the pressure directly: the key-value cache "is growing exponentially with agentic AI, and the memory hierarchy was not designed to handle it. HBM fills up. DRAM fills up. Once workloads spill over to storage, latency climbs and cluster performance drops" 15.
Two consequences follow. The AI buildout is now buying storage and flash as hungrily as it buys HBM, which is why enterprise SSDs are the single memory category whose price growth accelerates this quarter, on bit demand projected to grow more than 80% year over year in 2026 4. And new capacity takes years: cleanrooms, lithography and qualified output arrive on a construction schedule, which is why Micron's rebalancing answer is that it has no answer.
Where it lands on a product
The consequence for device makers is shrinking specifications, and IDC's forecast revisions show it arriving faster than the industry expected. In February the firm cut its 2026 outlook to a 12.9% decline in worldwide smartphone units and an 11.3% decline in PCs, each worse than the pessimistic scenario it had sketched two months earlier, with revenues roughly flat because average selling prices rose to cover the component 16.
IDC's description of how vendors are responding is the part worth carrying into a planning meeting. Rather than absorbing the cost, some manufacturers will cut the memory in the product: "a phone that might have shipped with 12GB of RAM and 256GB of storage a year ago may now debut with 8GB of RAM and 128GB of storage at the same price point, or worse" 16. The firm expects manufacturers to exit price points entirely at the bottom, and it expects the market below $50 to stop existing.
The industry's own purchasing power decides who survives that. Companies that can commit to large-volume contracts and hold supplier relationships will secure allocations at prices that are high but manageable; smaller and regional vendors, already running thin margins, will struggle to compete for supply at all, which IDC expects to shift share toward the largest global OEMs 16. Counterpoint's Ivan Lam told Rest of World that Chinese manufacturers have "drastically reduced" their entry-level projects this year and moved resources toward higher-margin devices, and that a price band which used to be below $150 "may become below $250, or even $300" 1.
The geography matters if your growth plan assumes emerging markets. Existing phone prices rose 21% in India, 19% across Asia-Pacific and 18% in the Middle East and Africa, against 5% in the United States 1. A US team reads the shortage as a margin problem; a team whose volume comes from those other three regions reads it as a demand problem. Omdia recorded Oppo's sub-$100 shipments in Southeast Asia falling 96%, and IDC counted more than 360 million phones shipping below $150 last year, a band that accounted for nearly 60% of Africa's market and about 30% of India's 1.
The sharpest version of this lands on the product category the industry spent the last two years marketing hardest. Local AI on a PC, an assistant running on a phone, a headset handling context on-device — all of them consume exactly the resource being rationed. IDC makes the point that shipping systems with less RAM constrains their ability to run local models, manage context windows and handle the data throughput that meaningful on-device AI requires, at the moment the industry needs a compelling AI story for those devices 16.
Where your product sits
- You ship hardware with a memory line in the bill of materials. Your 2027 cost model needs a supplier commitment attached to it, because more than three quarters of one major maker's 2027 output is already spoken for and Micron says the industry stays constrained through 2028 6.
- You sell an on-device AI feature. The feature's ceiling is now set by how much RAM the product team can afford, and the trend is downward: 12GB becoming 8GB is already a shipped decision 16. Decide which capability degrades when the memory budget is cut.
- You buy tokens. Your cost per token is now tied to a component market, and the same week brought a paper arguing that token pricing is the wrong unit for buyers whose real constraint is latency 17. If you are also tiering your own key-value cache to storage, you are buying into the same queue the data centres are in 14.
- You run agents in production. The memory bill scales with turns, context length and concurrency, which is a product decision you control 11. Context compaction and cache eviction are now cost features.
- You sell into India, Southeast Asia, Africa or Latin America. The entry tier that acquires your users is the tier being deleted. Plan an acquisition path that starts at a higher price, or accept a smaller funnel 1.
- You are in security or procurement. Suppliers are asking buyers to stop double-ordering, and panic buying from your own teams will show up as a false demand signal and a surplus later 3. Know which of your allocations are committed and which are hopes.
A watching brief
- Contract price prints, every quarter. TrendForce's quarterly projection is the fastest public read: conventional DRAM moved from 13–18% to 10–15% in the current quarter while HBM accelerated 4. A quarter where conventional DRAM prints flat is the first real signal.
- Whether 8-layer HBM substitution spreads. Moving accelerators from 12-layer to 8-layer HBM frees wafer capacity and raises cost per gigabit 5. Watch which accelerator vendors confirm it, because that decision changes the memory available to everything else.
- Chinese conventional DRAM and NAND qualifying with global brands. CXMT and YMTC are the only supply that could arrive inside the shortage's timeframe, and their rise carries its own procurement questions 3.
- Announced mix-downs. When a major OEM publicly reduces the RAM or storage in a named product line to hold a price, the shortage has reached the product page. IDC's February description is the template 16.
- Which consumer categories are rationed next. MLCCs and TV panels have already been through it 8. Each new category confirms that the pattern reaches past memory itself.
- Failure of the capacity response. Every supplier is adding cleanrooms on a multi-year schedule. Slippage in those timelines pushes the rebalancing date out, which is the one variable that would invalidate the planning assumption behind all of the above 6.
The decisions, with the clock on them
| Decision | What the sources provide | The constraint that decides it | Act when |
|---|---|---|---|
| Whether to lock 2027 memory supply now | A supplier reporting a completed 2027 HBM book and a constrained industry through 2028 6 | Allocation follows volume commitments and relationship, so late buyers get residual supply 16 | Before your next annual cost baseline |
| Which spec gives when the memory budget is cut | Vendors already cutting RAM and storage at a held price point 16 | On-device AI needs the memory you are removing 16 | At your next product review |
| Whether to hold a sub-$150 tier or exit it | Sub-$100 shipments down almost 60% year over year, with manufacturers reducing entry-level projects 1 | The tier's economics at current component prices 2 | When your next tier plan is drafted |
| How much context your agents may hold | A cache that grows with turns, context and concurrency, and a hierarchy rebuilt around spilling it to flash and SSD 11 | Latency against unit cost per session 15 | At your next inference cost review |
| Whether to buy tokens or hold hardware | A supplier rebuilding its business around long-term capacity commitments 6 | How much utilisation variance you can absorb against a take-or-pay commitment | At your next build-versus-buy review |
The price projections, the 2027 HBM revision and the 8-layer substitution discussion come from TrendForce's own releases of 29 and 30 September 2026; the forecasts are that firm's model, revised repeatedly this year, and the 121% figure is that firm's forecast. The 2027 supply statements, the completed HBM agreements and the "no line of sight" wording are Micron's own, published in its fiscal fourth-quarter prepared remarks. The 30% wafer-capacity figure is a Samsung executive's public expectation, corroborated by an independent TrendForce estimate of the same direction. The bill-of-materials arithmetic attributed to Micron — HBM3E needing roughly three times the wafer of DDR5 per bit — reaches this piece through a secondary trade report, so treat it as an industry estimate. The device-market numbers and the markets' response come from IDC's February analysis, Counterpoint's September price data and Rest of World's October reporting on Omdia, IDC and GSMA figures. The inference-workflow and memory-hierarchy descriptions come from TrendForce's technical analysis, published without peer review. Nobody in any of these documents offers a date for supply and demand to rebalance.
References
- 1How AI data centers are killing off the $100 smartphone
restofworld.org
- 2Global Existing Smartphone Prices Climb About 15% in 2026
counterpointresearch.com
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- 6Micron Fiscal Q4 2026 Earnings Call Prepared Remarks
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- 7AMD's Lisa Su asks rivals to share Taiwan chip capacity as demand surges
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- 9Toshiba to Double AI Data Center HDD Capacity by FY2027
trendforce.com
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- 11Beyond HBM: AI Inference Reshapes the Memory Hierarchy
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- 14Accelerate inference with KV cache tiering on AWS
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