
A 1.03 kHz photonic link between a trapped ion and a solid-state memory, a simulated code family that wires high-rate codes across planar modules, a 156-qubit processor operated around its defective components, and the three conditional instruments behind the week's commercial headlines.



| Item | What was proved or measured | Key figure | Evidence class | Next proof point |
|---|---|---|---|---|
| Ion–memory photonic link 2 | A trapped ion entangled with a solid-state memory through a wavelength- and encoding-converted photonic link | 1.03(1) kHz at 87.9(7)% Bell fidelity, four times the fastest trapped-ion photonic link | Processor measurement | Whether a link at this fidelity carries a distributed logical operation |
| DARPA Stage C entry 3 | Four architectures moved from plan review into government hardware verification | Stage C ceiling $300M per performer; committed amount not disclosed | Government instrument | A published verification or validation finding |
| Office of Strategic Capital loan 12 | A conditional commitment toward manufacturing and prototyping capacity | Up to $150M, strictly conditional and not guaranteed | Conditional financing | Execution of a final loan commitment |
| Quantinuum–UWA memorandum 13 | A non-binding agreement for cloud access and a possible applications centre | No metric disclosed | Non-binding agreement | A definitive agreement, or a delivered application result |
| Modular hyperbolic codes 7 | Simulated overhead of high-rate codes wired across planar modules | 10x or more; 34x at the largest colour-code point; rate 1/16, distance at least 22 | Circuit-level simulation | A module-seam error rate measured on hardware |
| Dynamic compass code on ibm boston 8 | A 7×7 code operated across a 156-qubit processor with defective components excluded | Logical error per round 0.0607 to 0.0256 in Z memory; up to 35% and 56% improvements | Processor measurement | Whether the gains hold without post-selection |
| Virtual error cancellation 9 | Residual logical error suppressed in classical post-processing from syndrome records | More than three orders of magnitude below the decoded logical error rate at distance 7 | Numerical study | A hardware demonstration at the same suppression |
| Streaming Regev 10 | Phase-estimation qubits used once, so they can be streamed rather than stored | 4n + O(sqrt n) qubits for an n-bit integer | Algorithmic construction | A circuit-level resource count including routing |
| Magic quantum code surgery 11 | A framework for fault-tolerantly measuring transversal Clifford logical operators in qLDPC codes | Distance preserved up to a constant factor; fault distance linear in code distance | Mathematical proof | An implementation on a named code family with schedules |
| Cs2CoCl4 on Forte Enterprise 14 | Magnetic excitation spectra and spin dynamics of a 36-site chain computed on 36 qubits | 420 two-qubit gates; similarity above 0.9, error below 0.15 | Processor measurement against DMRG | A material where the classical method is unavailable |
| Orbital-rotation shadows 15 | Classical post-processing cost of a hybrid chemistry workflow reduced | Cubic overlap scaling, quartic local-energy scaling; pentacene in about two days on eight A100s | Algorithmic scaling with projections | A run using a quantum-prepared trial state |
darpa.mil
newsroom.ibm.com
arxiv.org
quantinuum.com
research.google
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